Alwin Walter Zulehner, Robert Wille,
"Exploiting Coding Techniques for Logic Synthesis of Reversible Circuits"
: Asia and South Pacific Design Automation Conference (ASP-DAC), 2018
Original Titel:
Exploiting Coding Techniques for Logic Synthesis of Reversible Circuits
Sprache des Titels:
Englisch
Original Buchtitel:
Asia and South Pacific Design Automation Conference (ASP-DAC)
Original Kurzfassung:
Reversible circuits are composed of a set of circuit
lines that are passed through a cascade of reversible gates. Since
the number of circuit lines is crucial, functional logic synthesis approaches
have been proposed which realize circuits where the number
of circuit lines is minimal. However, since the function to be realized
is often non-reversible, additional variables have to be added
to the function in order to establish reversibility-leading to a significant
overhead that affects the scalability of the synthesis method
and yields rather complex circuits. In this work, we propose to overcome
these problems by exploiting coding techniques in the logic
synthesis of reversible circuits. To this end, we propose an intermediate
encoding of the output patterns that requires fewer additional
inputs and outputs. Using this synthesis scheme allows to perform
the majority of the synthesis on significantly fewer variables and to
exploit several dont care values in the code. Experimental evaluations where we obtain better scalability and circuits with magnitudes
fewer costs confirmed the benefits of the proposed synthesis
approach.
Forschungs-