Hardware Description Languages (HDL) facilitate the design
of complex circuits and allow for scalable synthesis. While rather
established for conventional circuits, HDLs for reversible circuits are in
their infancy and usually require a deep understanding of the reversible
computing concepts. This motivates the question whether reversible circuits
can also efficiently be designed with conventional HDLs, such as
VHDL. This work discusses this question. By this, it provides the basis
towards a design flow that requires no or only little knowledge of
the reversible computation paradigm which could ease the acceptance
of this non-conventional computation paradigm amongst designers and
stakeholders.