Design of a low-power and low-cost receiver front-end based on a N-path filter design
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7. Workshop der ARGE HFT
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This work addresses the often-conflicting demands of low-power and low-cost receivers in 868 MHz SRD applications such as data-rate, selectivity, and energy consumption. A reconfigurable front-end in a 180 nm technology based on an N-path filter with 1.2 V supply voltage is resented. The front-end implements a single receiver chain with witchable capabilities and inherent scaling of power consumption. For example, the receiver can demodulate simple OOK wake-up signals as well as narrowband 500 kHz IQ signals while offering increased selectivity. In that way, the power-consumption varies between 0.6 mW and 1.44 mW while 21dB voltage gain can be achieved.